Novel architectures and accelerators need to be assessed from a full-system perspective, assessing their impact on the behaviour of the different componenets of the computing system. With our extension to the gem5 full system simulation framework, named gem5-X, we facilitate the identification of computational bottlenecks and the implementation of architectural extensions to resolve them.
We can analyze the trade-offs of novel architectures and their implementation possibilities, and explore the interplay between software and hardware. Examples of such extensions include models for analog in-memory cores, tightly coupled systolic arrays, and in-package wireless communication.
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